Correlation Mechanics for Transferred Analog Block Yield Distributions across Secondary Wafer Foundries
Transferring analog blocks across secondary foundries requires mapping PCM covariance matrices to maintain targeted circuit yield distributions.
Low-Dropout Regulator Yield
Meaning
Parametric output of integrated voltage regulators determines the percentage of manufactured dies that meet all operational specifications. The concept of low-dropout regulator yield represents the proportion of circuits that maintain a stable output voltage under minimum input-to-output voltage differentials. This metric directly impacts the financial viability of power management integrated circuits.
Dropout Voltage
Minimizing the dropout voltage requires a large pass transistor to reduce the on-resistance of the regulator. Variation in transistor threshold voltages affects the regulator’s ability to maintain regulation at low input voltages. A higher threshold voltage shifts the dropout point upward, directly reducing the low-dropout regulator yield.
Test Program
Automated test systems measure the output voltage while sweep tests vary the input voltage and load current. Units failing to maintain the output within specified tolerances are rejected at the wafer probe.
Yield Optimization
Design engineers adjust the channel width of the pass transistor to balance the chip area against parametric fallout. Increasing the transistor area lowers dropout resistance but reduces the number of potential dies per wafer. Optimizing this tradeoff requires statistical simulation of process corners to ensure that the distribution of dropout voltages remains well within the limits of the test program under all manufacturing conditions.