Meaning
High-density integrated circuits require specialized trace configurations to connect their closely spaced pins to the rest of the board. The fan out routing refers to the method of running short trace segments from the fine-pitch pads of a chip to vias that connect to other board layers. This layout pattern is essential for components with hundreds of pins, such as field-programmable gate arrays.
It determines the number of board layers needed.
Escape Routing
Routing the signals out from beneath a dense ball grid array requires careful planning. The fan out routing pattern must be symmetrical to prevent manufacturing defects during the reflow solder process, where uneven surface tension can cause the chip to shift or tilt. This escape pattern must allow every signal trace to exit the pin field without violating the minimum trace-width and trace-spacing design rules, ensuring reliable solder joints.
It also ensures that the assembly is easy to inspect with x-ray machines.
Crosstalk Management
Densely packed signal lines running parallel to each other are susceptible to mutual electromagnetic coupling. Designers organize the fan out routing to include ground shield traces and interleaved routing layers to isolate sensitive analog lines from high-speed digital busses. This shielding prevents the high-frequency switching noise of the memory controller from corrupting adjacent signal paths.
Via Implementation
Connecting the chip pads to the internal signal planes involves drilling small holes filled with conductive material. The type of vias used in the fan out routing, such as blind, buried, or microvias, directly affects the overall fabrication cost of the board. This selection balances trace density with manufacturing limits.
