Meaning
Microcontroller register operations redirecting CPU exception interrupt vector addresses to dynamic RAM or alternate flash banks enable flexible interrupt handling. Vector table relocation alters internal CPU base register pointers to point to new interrupt service routine offset tables. The operation governs interrupt handler assignment, terminating once vector offset registers are locked.
Hardware Mechanics
ARM Cortex-M microcontrollers start execution with vector tables mapped fixed at flash address zero, containing initial stack pointers and exception addresses. Vector table relocation writes target memory addresses into the Vector Table Offset Register, remapping interrupt vectors to internal SRAM or application flash sectors. Microcontrollers execute this register write during early system initialization before enabling global interrupts.
Bootloader Integration
Dual-stage bootloader designs rely on relocating interrupt tables to transfer hardware control cleanly between primary boot routines and main application images. Executing vector table relocation allows main application binaries residing at offset flash locations to handle hardware interrupts without modifying read-only bootloader code. Logic analyzers and debug probes monitor vector table offset register values during startup to confirm that interrupts execute code from valid memory ranges.
Misconfigured table alignment boundaries trigger immediate hard fault exceptions upon interrupt assertion.
Fault Protection
Failing to update vector offset registers prior to jumping to application code causes interrupts to execute legacy bootloader routines. Vector table relocation ensures that dynamic software applications manage hardware peripherals using their own dynamic interrupt handlers. Proper vector remapping is mandatory for field firmware update systems.
