Meaning
Debugging of electronic assemblies is often limited by the physical access to internal circuit nodes. Engineers utilize virtual probing to analyze signals that are inaccessible on a high density printed circuit board. This method uses software models of the traces and components to reconstruct the waveform at a specific point.
It avoids the capacitive loading and physical risk associated with traditional mechanical probes.
Internal Visibility
Modeling the electromagnetic behavior of the board allows for the prediction of crosstalk and signal degradation. In virtual probing, the mathematical representation of the interconnects provides a view of the signal as it would appear at the chip pin. This insight helps identify reflections or timing jitter that could disrupt high speed data transfers.
Parasitic Modeling
The process begins with the extraction of a parasitic model from the layout data of the assembly. Virtual probing then combines this model with the measured waveforms from accessible test points. By applying inverse transformation algorithms, the system calculates the state of the internal signal.
This approach is particularly useful for fine pitch ball grid array packages where the pins are hidden beneath the component body. It allows for the validation of the design against the thermal and electrical budget without building multiple physical prototypes.
Node Reconstruction
Isolating the source of a failure in a complex system becomes faster when hidden nodes can be monitored. Virtual probing reduces the need for expensive rework or the addition of sacrificial test points. It improves the efficiency of the hardware qualification process.
