Meaning
Measurement of the duration required for a phase-locked loop or automatic gain control system to reach a stable state within a specified error margin after a perturbation is a fundamental performance metric in wireless transceivers. This closed-loop convergence time determines how quickly a device can transition from a low-power sleep mode to active transmission or reception. If the system is too slow to settle, packet preambles may be missed or transmitter emissions may spill into adjacent channels.
A well-defined convergence metric helps designers budget the wake-up times and slot durations of time-division communication protocols.
Lock Duration
Phase acquisition is the primary phase where the frequency difference between the reference and feedback signals is brought to zero. In typical synthesizers, the closed-loop convergence time is governed by the natural frequency of the loop filter and the phase margin. A higher phase margin prevents excessive ringing but increases the overall lock time.
Engineers must select component values that balance these conflicting requirements to prevent packet truncation.
Loop Bandwidth
The frequency range over which the loop tracks input variations dictates the speed of the transition. When the bandwidth is wide, the closed-loop convergence time is short, but the output carries more phase noise from the reference oscillator. Designers use a dynamic loop bandwidth approach to optimize both parameters by keeping the filter wide during acquisition and narrowing it after a lock is achieved.
Transient Behaviour
Damping factors determine how the error signal decays toward zero during the locking cycle. Unstable systems exhibit oscillatory behaviour that extends the closed-loop convergence time or prevents lock altogether. Accurate thermal and electric modelling of the loop components ensures that the settling remains monotonic across the entire operating temperature range.
