Meaning
Electrical measurement of the power consumption when a device is in its lowest possible functional state. This deep sleep current represents the baseline energy draw while the processor is inactive and only a low-power timer or interrupt pin remains powered. Minimizing this value is essential for hardware designed to operate for a decade on a single battery.
Most of the internal circuitry is physically disconnected from the power rail during this phase. Engineers calculate the total energy budget by multiplying this value by the time spent in dormancy.
Hardware State
Specialized power management integrated circuits shut down all non-essential domains within the module. The deep sleep current is influenced by leakage through capacitors and the quiescent current of the voltage regulators. Design choices regarding board layout and component selection determine the final measurement.
System logic resumes operation from a saved state to avoid a full cold boot.
Wakeup Mechanism
External events or internal timers trigger the transition back to an active processing state. Maintaining the deep sleep current requires careful configuration of the general-purpose input pins to prevent floating voltages.
Battery Calculation
Total device longevity is primarily a function of the time spent in this dormant state. If the deep sleep current is too high, the standby energy loss will deplete the battery before the operational life expires. Laboratory verification uses high-sensitivity ammeters to confirm the microampere-level draw.