Sub-GHz Radio Frequency Synthesizer Crystal Thermal Dissipation Mechanics
Sub-GHz PA power bursts generate micro-Kelvin crystal thermal gradients that shift carrier frequency, demanding thermal isolation and tight TCXO specification.
Fractional-N PLL
Meaning
Frequency synthesis using a phase-locked loop with a non-integer division ratio allows a wireless transceiver to generate a wide range of output frequencies from a single reference crystal. This architecture, known as a fractional-n pll, enables high-precision tuning of the local oscillator to match the exact carrier frequencies required by different wireless standards. It overcomes the limitation of integer-n synthesizers, which can only tune in multiples of the reference frequency.
The system achieves this by switching the division value between integers during operation.
Frequency Resolution
Fine channel spacing is achievable without reducing the reference frequency of the phase-locked loop. In a fractional-n pll, this high resolution allows the use of wider loop filter bandwidths, which reduces lock times and limits phase noise.
Spur Generation
Switching between division ratios introduces periodic patterns in the feedback signal that appear as unwanted spurious emissions. These fractional spurs must be managed through delta-sigma modulation or phase interpolation techniques to prevent adjacent-channel interference.
Phase Noise
Delta-sigma modulation used to randomize the division ratio shapes the quantization noise to higher frequencies where it can be filtered. However, if the loop filter bandwidth of the fractional-n pll is too wide, this high-frequency noise will pass through to the output, degrading the transceiver’s modulation quality and receiver selectivity. Engineers must carefully calculate the filter poles to achieve a fast lock time while suppressing both the in-band reference noise and the out-of-band quantization noise.