Meaning
Unintentional current flow through transistors even when they are in an off state accounts for the baseline power consumption that depletes batteries in mobile devices during standby modes. This phenomenon is caused by the physical properties of the silicon and the extreme thinness of the gate oxides in modern sub micron processes. Even when the logic gate is not switching, a small amount of charge can leak through the transistor channel or the gate itself.
As the size of transistors continues to shrink, static leakage has become a significant percentage of the total power budget. Measuring this current is critical for predicting the shelf life and the runtime of battery powered connectivity modules.
Transistor Dissipation
Physical mechanisms behind this loss of energy include subthreshold conduction and gate oxide tunneling. Subthreshold leakage occurs when a small current flows between the source and the drain even when the gate voltage is below the threshold. Gate tunneling happens when electrons pass through the thin insulating layer of the gate due to quantum effects.
These processes are always present and cannot be completely eliminated. Static leakage increases exponentially with temperature, which means that a device will consume more power when it is running hot. This creates a thermal feedback loop where the leakage generates heat, which then increases the leakage further.
Engineers use special low leakage transistor designs for circuits that must remain powered on during sleep modes.
Battery Consumption
Longevity of a wireless sensor is directly limited by the amount of current it draws when it is not doing anything. In many IoT applications, the device spends 99 percent of its time in a low power sleep state. During this time, static leakage is the dominant source of power consumption.
If the leakage is too high, the battery will be exhausted much sooner than expected, regardless of how efficient the active mode is. Designers select components with the lowest possible leakage specifications for these applications. They also use power gating techniques to completely disconnect the power from unused logic blocks.
This physical disconnection is the only way to stop the leakage current entirely. The total leakage of a system is the sum of the leakage from every component on the board.
Thermal Limit
Heat dissipation from this background current can affect the performance and reliability of high density chips. In a large FPGA or processor with millions of transistors, the cumulative static leakage can generate several watts of heat even when the chip is idle. This must be accounted for in the thermal design of the enclosure and the choice of cooling method.
If the device cannot dissipate this heat, its temperature will rise and the leakage will increase, potentially leading to thermal runaway. Silicon manufacturers provide leakage power specifications for different voltage and temperature corners. These values are used to design the power delivery network and to set the safety limits for the system.
Controlling static leakage is one of the primary challenges in the development of the next generation of high performance and low power electronics.
