Meaning
Percentage of fabricated semiconductor circuits on a silicon slice that successfully pass all functional tests at the end of the manufacturing flow defines the efficiency of the production line. This parameter, representing the wafer processing yield, determines the cost per good die and the profitability of a semiconductor fabrication plant. It is measured by dividing the number of functional dies by the total number of print areas on the wafer.
The value depends on process complexity, cleanliness and design margins. Maintaining high metrics is necessary to sustain competitive pricing in highly demanding consumer electronic markets.
Defect Density
Particle contamination represents the primary driver of catastrophic failures in high-density integrated circuits. As the wafer processing yield decreases, it is often traced back to airborne particles or chemical impurities deposited during photolithography or etching. Minimizing these defects requires operating within class-one cleanrooms and implementing continuous airborne particle monitoring.
Process Control
Statistical monitoring of key parameters like gate-oxide thickness and metal-line resistance helps engineers maintain consistent manufacturing conditions. In-line measurements and scanning electron microscope reviews trace deviations before they affect the wafer processing yield. This monitoring occurs after each critical step to ensure that the process remains within established control limits.
Economic Viability
Production cost per chip scales inversely with this percentage, making high yields essential for high-volume consumer electronics. A low wafer processing yield can make a product economically unfeasible, requiring a redesign of the layout or a revision of the process parameters. This metric is the primary benchmark used to sign off on the release of a new process technology.
