Meaning
Electronic states located in the near-interface oxide region of metal-oxide-semiconductor structures act as slow exchange centers for mobile charge carriers. These defects, commonly referred to as border traps, communicate with the underlying semiconductor channel through tunneling or thermal activation. Their response time is typically much longer than that of interface traps, distinguishing them during dynamic measurements.
They occupy a region spanning from a few angstroms to several nanometers into the dielectric. While interface states respond almost instantaneously to signal variations, these deeper defects require longer timescales to exchange charge, making them highly visible during low-frequency characterization.
Spatial Location
Dielectric regions adjacent to the semiconductor boundary host these near-interfacial defects. Positioned beyond the immediate interface plane, border traps lie shallowly embedded within the oxide layer. This physical separation prevents instantaneous charge transfer with the semiconductor bands.
Carrier Exchange
Tunneling governs the slow capture and emission of channel carriers by these dielectric states. In typical operation, the local field modulates the alignment of these border traps with the channel Fermi level, driving slow charge trapping. This process is highly dependent on both dielectric thickness and temperature.
Instability Impact
Threshold voltage drift occurs when these interfacial states accumulate charge over operating cycles. Under bias temperature stress, border traps contribute to long-term drift in transconductance and drain current. The resulting instability limits the reliability of radio-frequency front-end switches and power amplifiers.
Eliminating these defects involves optimized gate stack engineering.
