Meaning
Long term reliability of analog silicon depends on the stability of matched transistor pairs. Over time, current mirror degradation reduces the accuracy of the current ratios within an integrated circuit. This shift often stems from electrical stress that alters the physical properties of the individual transistors at different rates.
Aging Mechanism
High voltage stress leads to the buildup of charges in the gate oxide of the transistors. During current mirror degradation, the relative strength of the transistors changes, which causes the output current to drift away from the target value. This imbalance is more severe in circuits that operate at high temperatures for extended periods.
Mismatch Consequence
Precision in data converters relies on balanced current sources to maintain linearity. If current mirror degradation occurs, the converter might skip certain output levels or introduce distortion into the signal. These errors are often permanent and cannot be corrected by software once the silicon has aged.
A system with excessive mismatch will eventually fail to meet its performance specifications.
Operational Lifetime
Designers mitigate the effects of aging by using larger transistor geometries in the layout. While bigger transistors occupy more space, they are less susceptible to current mirror degradation because the charge buildup is spread over a wider area. Choosing the right size involves a balance between the total chip area and the required operational life.
This careful planning ensures the product remains functional for its entire intended service period.
