Trap Rich Polysilicon Layer Optimization for Harmonic Suppression in Front End Modules
Trap rich polysilicon layers freeze interface charges to hold high resistivity and suppress switch harmonics below minus eighty dBc.
LPCVD Polysilicon
Meaning
Polycrystalline silicon deposited via low-pressure chemical vapor deposition acts as a high-purity conductor or charge-trapping layer in semiconductor devices. Utilizing LPCVD polysilicon provides excellent step coverage and uniform thickness across complex three-dimensional wafer topographies. The material applicability is bounded by its high deposition temperature, which restricts its use to early stages of the device fabrication process before metals with low melting points are introduced.
Deposition Process
Thermal decomposition of silane gas at high temperatures occurs in a vacuum reactor. This slow reaction ensures a highly uniform film with controlled grain structure. The resulting material can be doped during or after deposition.
Trapping Application
Undoped versions of this deposited material are integrated into silicon-on-insulator substrates to act as a trap-rich layer. This layer contains a high density of grain boundary defects that capture and immobilize free carriers. It prevents the formation of a parasitic conduction layer beneath the buried oxide.
Residual Stress
Residual stress of the deposited film depends heavily on the deposition temperature and post-deposition annealing. High tensile or compressive stress can cause wafer deformation and affect lithography alignment. Careful optimization of the thermal cycle is necessary to minimize stress while achieving the desired grain size.