Meaning
Microscopic fractures occurring at the boundary between a metal silicide layer and the underlying silicon substrate disrupt the electrical path within a transistor. Silicide interfacial microcracking often results from the high mechanical stress generated during the rapid thermal processing steps of wafer fabrication. These cracks can lead to increased contact resistance or complete open circuits in the device interconnects.
Mechanical Stress
Differential expansion between the silicide and the silicon creates tension as the wafer cools down from high temperatures. If the stress exceeds the fracture toughness of the material, silicide interfacial microcracking begins to form at the corners of the contact area. This tension is particularly high in advanced nodes where the contact dimensions are extremely small.
Manufacturing Process
Control of the annealing environment and the cooling rate is essential for preventing these defects from occurring. To reduce the risk of silicide interfacial microcracking, engineers often use a two step annealing process that allows the materials to stabilize at lower temperatures. The choice of the metal, such as cobalt or nickel, also affects the amount of stress that develops during the reaction.
Electrical Continuity
Monitoring the resistance of the contacts over a large number of test structures helps identify the onset of this failure mode. Silicide interfacial microcracking appears as a sudden increase in resistance or as intermittent electrical failures during thermal cycling. Manufacturers use electron microscopy to verify the presence of these cracks and to ensure that the process changes have effectively removed the problem.
This ensures that the final product has stable and reliable electrical connections for its entire service life.
