Meaning
Boundary regions between the thermal silicon dioxide layer and the monocrystalline silicon film define the electrical isolation in silicon-on-insulator substrates. The buried oxide interface determines the density of trapped charges and interface states that influence the threshold voltage of overlying transistors. This boundary is characterized by chemical abruptness and a transition region that is typically only a few monolayers thick.
Charge Trapping
Electrical stress in radio-frequency switches often leads to carrier injection across this critical boundary. Trapped holes or electrons at the oxide boundary alter the local electrostatic potential. This shifts the flatband voltage and leads to drifts in the device performance.
Substrate Loss
Parasitic conduction occurs when mobile carriers are drawn to the oxide boundary by bias voltages. The quality of the buried oxide interface affects the severity of these losses under radio-frequency operation. Implementing a trap-rich layer helps mitigate these unwanted conduction effects.
Manufacturing Integrity
High-temperature wafer bonding is required to form a uniform oxide transition with low defect densities. Microvoids or chemical contamination at this boundary will degrade the breakdown voltage of the finished device. Careful pre-bonding surface preparation is critical to ensure uniform mechanical adhesion and thermal reliability across the entire wafer surface, preventing localized delamination during backend processing.
